A transmitter includes a predriver circuit configured to perform a first equalization process to compensate jitter caused by the predriver circuit. The predriver circuit includes a first path having a first driving strength and configured to generate a first path output signal by applying a first delay to a predriver input signal. The predriver circuit includes a second path having a second driving strength less than the first driving strength and configured to generate a second path output signal by applying a second delay to the predriver input signal. A summing node is configured to combine the first path output signal and the second path output signal to provide a summing node output signal. A driver circuit coupled to the predriver circuit is configured to generate a driver output signal based on the summing node output signal and drive the driver output signal to a receiver through a channel.
